A current limiting technique, which is a very important protection technique in power electronic control, is related directly to the reliability of switching devices. It can effectively protect devices at the time of sudden loading or short circuit, so as to improve the impact resistance of a system. By designing an appropriate current limiting threshold point, it is made possible to ensure that: when a current exceeds the current limiting threshold point, switch transistors are timely turned off, such that the current will not continue to rise any longer, so as to achieve the object of protecting devices; and when the current falls to below the current limiting threshold point, an appropriate timing is then selected to release the control over the switch transistors, so as to continue to output a voltage, thus completing a whole current limiting process.
However, a time delay during current limiting will cause that although an actual current already reaches the set threshold point, the switch transistors cannot be timely turned off, such that the current will continue to rise to exceed the set current limiting threshold point, resulting in extra heat loss and turn-off stress. A fixed and knowable time delay can be compensated by properly decreasing the set current limiting threshold point while considering normal load-carrying capacity; however, if this time delay is changing, it is inconvenient to compensate the time delay by decreasing the current limiting threshold. Moreover, decreasing the current limiting threshold possibly will make it impossible to satisfy load-carrying capacity, and too much heat loss and turn-off pressure of the switch transistors will be caused if the current limiting threshold is selected to be too high.